[Xastir] has anyone ever considered an info kisok in xastir ?
Jeremy McDermond
mcdermj at xenotropic.com
Wed Nov 11 13:24:26 EST 2009
On Nov 11, 2009, at 1:10 PM, Craig Anderson wrote:
> I like the ax25 kernel stack too, but I have heard that those kernel
> modules are not multiprocessor safe. I have not looked into it that
> deeply. Does anyone know if that is true or not? If not, then I'll
> have to run a single-processor version of Linux with AX.25 in a VM
> on my dual-processor Linux server. Any hints would be appreciated.
I don't know if it's supported, and I haven't looked at the code, but
I'm running the ax25 kernel stack on an AMD Athlon X2 on the amd64
kernel:
Linux aprs 2.6.29-gentoo-r5-aprs #1 SMP Fri Jul 17 12:27:29 PDT 2009
x86_64 AMD Athlon(tm) 64 X2 Dual Core Processor 3800+ AuthenticAMD GNU/
Linux
processor : 0
vendor_id : AuthenticAMD
cpu family : 15
model : 43
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 3800+
stepping : 1
cpu MHz : 2010.523
cache size : 512 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt lm
3dnowext 3d
now rep_good pni lahf_lm cmp_legacy
bogomips : 4021.04
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp
processor : 1
vendor_id : AuthenticAMD
cpu family : 15
model : 43
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 3800+
stepping : 1
cpu MHz : 2010.523
cache size : 512 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt lm
3dnowext 3d
now rep_good pni lahf_lm cmp_legacy
bogomips : 4019.91
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp
>
> Thanks,
> Craig
> n6yxk
--
Jeremy McDermond (NH6Z)
Xenotropic Systems
mcdermj at xenotropic.com
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